Technical Field
The present application relates to a semiconductor device.
Background Art
Power semiconductor devices such as IGBTs and power MOSFETs have been studied and developed, for example, as disclosed in Japanese Patent Laid-Open No. 2007-5368. The semiconductor device disclosed in this publication has an AlSi layer, an Ni layer and a solder layer laid one on another in this order on a semiconductor substrate formed, for example, of silicon. For provision of the semiconductor layer, an Ni layer having good solder wettability is required. An Al-based layer such as an AlSi layer is provided for performing Ni plating. The need for an Al-based layer is specifically mentioned, for example, in paragraph 0007 in this publication.
In a power semiconductor element with which electric power is handled, the amount of heat generation accompanying its operation is large and an electrode laid on a front surface of a semiconductor layer is thermally expanded by heat generation. When a stress is caused in the electrode and the stack structure of the semiconductor layer with a change in temperature, there is a risk of a crack being generated in the semiconductor layer surface or the electrode. Also in an electrode having a stack of layers of different metals having different linear expansion coefficients as in the above-mentioned related art, stress is also caused between the layers by thermal expansion. However, the above-mentioned publication lacks consideration of the problem of cracking accompanying such thermal stress. With conventional semiconductor devices, there have been problems to be solved from the viewpoint of thermal stress.